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LIBRARY

AiEDA Library

Design-to-Vector:把 iEDA.ai 流程中的设计状态导出为特征、图与张量,供训练与推理使用。

iMapsynthesisiFPfloorplaniPDNpoweriPLplacementiCTSclockiTOoptimizationiRTroutingiSTAtimingAiEDAdesign dataiPCLlayout modeliMapsynthesisiFPfloorplaniPDNpoweriPLplacementiCTSclockiTOoptimizationiRTroutingiSTAtimingAiEDAdesign dataiPCLlayout model
WHY

为什么需要 Library

没有开放中间态,AI-for-EDA 只能停留在黑盒结果上。Library 把单元、网络、时序路径、拥塞图等变成可版本化的数据接口,让实验可复现、可对比。

  • 对接统一 iDB 状态
  • 服务 Model 与外部训练框架
  • 与论文 J12 AiEDA 同一产品线
design → vector
iDB snapshot
  → net/cell/timing/congestion
  → numpy / graph tensors
  → train or infer
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An Open-Source AI-Aided Design Library for Design-to-Vector

Overview

AiEDA is an open-source AI-native Electronic Design Automation (EDA) library that revolutionizes chip design workflows by introducing a unified design-to-vector methodology. Built on the iEDA infrastructure, it transforms diverse chip design data into standardized multi-level vector representations through modular engine integration, comprehensive data extraction frameworks, and hierarchical data management. AiEDA bridges traditional EDA tools with modern AI/ML techniques by providing complete physical design flows, programmatic data extraction capabilities, and standardized Python interfaces, establishing an AI-aided design (AAD) paradigm that enables seamless integration between EDA datasets and AI frameworks.

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Data Transformation for AI-aided design (AAD)

::: tip Note Github repo: https://github.com/OSCC-Project/AiEDA :::