iMapsynthesisiFPfloorplaniPDNpoweriPLplacementiCTSclockiTOoptimizationiRTroutingiSTAtimingAiEDAdesign dataiPCLlayout modeliMapsynthesisiFPfloorplaniPDNpoweriPLplacementiCTSclockiTOoptimizationiRTroutingiSTAtimingAiEDAdesign dataiPCLlayout model
Ye Cai, Zonglin Yang, Liwei Ni, Junfeng Liu, Biwei Xie, and Xingquan Li*, Parallel AIG Refactoring via Conflict Breaking, in Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS), Singapore, 2024. (CCF-C)