Data stream processing and analysis
1 Problem background
Reasonable logical interaction design can improve the reliability and stability of the system and better meet the needs of users. Therefore, we need to pay attention to the information flow and interaction between various modules to ensure the normal operation of the system and a good user experience. For the iEDA project, in order to achieve interaction between different point tools, we need to pay attention to the data flow changes of the platform, the services provided by the platform, the API interfaces and logical interactions of each point tool of iEDA, etc.
2 Problem description
1、Implement requirements: Follow the module division of the iEDA platform to complete the following functions: use iEDA to read the gcd design file, run the iEDA point tool process in sequence according to the EDA back-end design process, and refer to the report of the existing point tool (the output file under reportContents, such as cts _db.rpt, drc.rpt, drv_db.rpt, filler_db.rpt, fixfanout_db.rpt, fp_db.rpt, hold_db.rpt, lg_db.rpt, pl_db.rpt rt_db.rpt, etc.) output results, it is necessary to summarize the changes in the relevant parameters of each process (such as CORE Usage, IO pin Number, Instance Number, Net Number, etc.). Students need to design the corresponding Json data structure to show the parameter changes of each process. The Json examples are as follows. The examples are for reference only and students can design by themselves.
{ "Instance Number": { #Parameters output by each point tool "iDB(database)-floorplan": 932, "iNO-fix_fanout": 932, "iPL-filler": 2048, "iPL-legalization": 942, "iPL-placement": 932, "iCTS-cts": 943, "iTO-fix_drv": 942, "iTO-fix_hold": 942, "iRT-routing": 942, }, "Core Usage": { "iDB(database)-floorplan": 0.392942, "iNO-fix_fanout": 0.392942, "iPL-filler": 0.972277, "iPL-legalization": 0.396726, "iPL-placement": 0.392942, "iCTS-cts": 0.396963, "iTO-fix_drv": 0.396726, "iTO-fix_hold": 0.396726, "iRT-routing": 0.396726, }, "Cut Different Layer Spacing": 0, # Unique configuration parameter settings in drc.rpt generated by iDRC tool "Metal Parallel Run Length Spacing": 580
}Report generation Contents example: iEDA/scripts/design/sky130_gcd/result/report
The iEDA project link is as follows:https://gitee.com/oscc-project/iEDA
As a basic base, iEDA includes the following main content modules: file system, database, etc.
2. How to run the script through iEDA:
(1) Taking gcd design as an example, the sky130 process is used to run layout planning (iFP), fan-out optimization (iNO_fix_fanout), layout (iPL), CTS (ICTS) and other point tools in sequence.
● sky130 process library location: iEDA/scripts/foundry/sky130 ● Main entrance to run script: iEDA/scripts/design/sky130_gcd/run_iEDA.py ● Netlist file designed by gcd: iEDA/scripts/design/sky130_gcd/result/verilog/gcd.v ● sdc constraint file: iEDA/scripts/foundry/sky130/sdc/gcd.sdc ● Run command: ○ Enter the iEDA project: cd [iEDA project parent Contents]/iEDA ○ Update the code to the latest code: git pull ○ Compile and build the project: bash[build.sh](https://build.sh) ○ Copy the executable file to the sample Contents: cp bin/iEDA scripts/design/sky130_gcd/ ○ Enter sample Contents: cd scripts/design/sky130_gcd ○ Modify the file and comment out lines 23 to the end of the file: vim[run_iEDA.py](https://run_iEDA.py) ○ Run script: python[run_iEDA.py](https://run_iEDA.py)
3. Overview of project file Contents：
- iEDA main Contents overview:
| iEDA sub-Contents name | Content overview |
|---|---|
| cmake | Contains configuration information for building and managing Cmake projects |
| docs | Contains project-related learning materials and project wizards |
| scripts | Data and process files that need to be read, as well as script files and output results |
| src | iEDA project point tools and platform related source code |
- iEDA/srcContents overview:
| iEDA/src sub-Contents name | Content overview |
|---|---|
| analysis | Algorithm analysis expansion interface provided externally |
| apps | Combined with related businesses, some common applications are set up |
| database | Use different classes to store the data after parsing it |
| evaluation | Module for evaluating algorithms at different points in the tool flow |
| interface | Interactive interface codes that can be used externally, including gui, python, tcl, shell, etc. |
| operation | The implementation of point tool function modules includes: iCTS, iDRS, iECO, iFP, iLR, iLO, iMP, iNO, iPDN, iPL, iPW, iRT, iSTA, iTM, iTO, etc. (see Figure 3-2) |
| platform | Combined with specific business needs, combined with the interface encapsulated by point tools, it realizes the reading, processing, analysis, storage, application, etc. of some intermediate data applied to specific businesses. |
| solver | Provide specified algorithm solutions, including clustering wiring layout, etc. |
| third_party | Third-party dependent libraries used |
| utility | Development of utilities that simplify the development process |
3 input and output
Algorithm input
Taking the cts process as an example, you can first read the [design file] through [iEDA run main script] and run the floorplan, fix_fanout, place and cts processes. Each process will generate corresponding .def files and log, report and other files. Check the [designName]_hold.skew and [designName]_setup.skew files under reportContents. The main documents are as follows: ● Design file: iEDA/scripts/design/sky130_gcd/result/verilog/gcd.v ● cts configuration file: iEDA/scripts/design/sky130_gcd/iEDA_config/cts_default_config.json ● iEDA runs the main script: iEDA/scripts/design/sky130_gcd/run_iEDA.py
algorithm output
The algorithm output is mainly divided into two parts: refer to the Summary report obtained by each process, and design the corresponding Json file output. See the problem description for output examples. Students can design the data structure in Json by themselves. Among them, the screenshot of the Summary report sample implemented in the existing project is as follows.
The existing Summary report implementation is shown in Figures 5, 6, and 7 below (for reference only):