2023 the CCF-DAC Digital EDA Algorithms and Models Forum

[Forum 1: Digital EDA Tools, Algorithms, and Models Forum]
Date: October 14, 2023, 13:30 PM - 6:00 PM
Sponsored by: Beijing Institute of Open Source Chips
Forum Description: To bridge the gap between industry and academia, an open-source, full-chain EDA development platform is urgently needed to explore new EDA research methodologies and technologies, to train EDA professionals, to synchronize the transfer of problems between industry and academia, and to transfer key technologies from academia to industry. This will form a good product-research-development loop, improving the efficiency and quality of EDA research. Open-source is the best way to provide EDA development platforms to all researchers in various disciplines, and this forum aims to promote the development of a high-quality open-source EDA tool platform and key technologies.
Chair: Bao Yungang, Institute of Computational Science, Chinese Academy of Sciences
Co-Chair: Li Xingquan, Pengcheng Laboratory

Program Schedule

Time	Title	Speaker	Affiliation
Session 1 (Chairperson: Jie Bi, Institute of Computational Science, Chinese Academy of Sciences)
13:30-14:00	How EDA Revolutionizes Semiconductor Industry Transformation	Xiong Xiaoming	Guangdong University of Technology
14:00-14:30	Machine Learning in EDA: When and How	Yu Bei	Hong Kong University of Science and Technology
14:30-15:00	Mathematical Models and Algorithms for Digital Integrated Circuit Layout Planning, Hierarchical Modular Layout, and Global Routing	Zhu Wenxing	fuzhou University
15:00-15:30	Combining SAT Sweeping and Exact Simulation for Equivalence Verification Methods	Cai Shaowei	Chinese Academy of Sciences Software Institute
Session 2 (Chairperson: Li Xingquan, Pengcheng Laboratory)
15:50-16:15	FPGA Dynamic Reconfiguration System Partitioning, Scheduling, and Layout Co-Design Method	Chen Song	Chinese University of Science and Technology
16:15-16:40	Parallel Sparse LU Decomposition Open-source Software Package for Accelerating Transistor-Level Integrated Circuit Simulation	Zhu Zhufei	Ningbo University
16:40-17:05	Logic Inference Engine and Logic Optimization Based on Matrix Semi-Tensor Product	Jin Zhou	China University of Petroleum (Beijing)
17:05-17:30	RTLLM: An Open-source Benchmark for RTL Generation with Large Language Model	Xie Zhiyao	Hong Kong University of Science and Technology
17:30-17:55	In Pursuit of Deciphering ReLU Networks and Beyond	Fan Fenglei	Hong Kong University of Science and Technology

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