AI for EDA research
algorithms, data & reproducible systems
We study machine learning and large models for electronic design automation—logic synthesis and technology mapping, placement and routing, timing optimization, design-rule and manufacturability checks, circuit/layout representation and pretraining, and agent-ready open toolchains. Papers, benchmarks, and open subjects are collected here and grounded in open-source iEDA / AiEDA engineering.
# synthesis · place · route · timing · representation [papers] 48+ journal / conference → ML · LLM · Agent · benchmark
Research entry points
From papers and evaluation to open subjects and the intelligence layer.
Papers
Journal and conference work across AI-for-EDA subfields (TCAD, TODAES, …).
Open →Surveys
Literature maps for AIEDA / EDA / PDA / AIPDA.
Open →Benchmark
Reproducible suites, baselines, and comparisons.
Open →Open subjects
Participatory directions in flow and physical design.
Open →Achievements
Patents, software copyrights, and awards.
Open →Intelligence layer
Engineering Library / Model / Dataset / iPCL from research.
Open →DD-DeepONet: A domain decomposition DeepONet framework for PDEs on structured domains with geometry and physics variatio
Bo Yang, Xingquan Li, Jie Zhao, Ying Jiang*. DD-DeepONet: A domain decomposition DeepONet framework for PDEs on structured domains with geometry and physics variations ,
Details →CircuitFlow: Learning Dynamic Representations for Logic Optimization
Miao Liu , Xinhua Lai , Liwei Ni , Xingyu Meng , Rui Wang , Junfeng Liu , Xingquan Li*, Jungang Xu*. CircuitFlow: Learning Dynamic Representations for Logic Optimization
Details →SensTDDP: A Timing Sensitivity Analysis Framework with Application to Timing-Driven Detailed Placement
Qiang Yang, Jiahui Li, Hongxi Wu, Xingquan Li, Bei Yu, Wenxing Zhu*. SensTDDP: A Timing Sensitivity Analysis Framework with Application to Timing-Driven Detailed Placemen
Details →A Survey of Machine Learning Approaches in Logic Synthesis
Miao Liu, Liwei Ni, Junfeng Liu, Xingyu Meng, Rui Wang, Xiaoze Lin, Xinhua Lai, Xingquan Li*, and Jungang Xu*. A Survey of Machine Learning Approaches in Logic Synthesis
Details →AiEDA: An Open-Source AI-Aided Design Library for Design-to-Vector
Yihang Qiu, Zengrong Huang, Simin Tao, Hongda Zhang, Weiguo Li, Xinhua Lai, Rui Wang, Weiqiang Wang*, Xingquan Li*. AiEDA: An Open-Source AI-Aided Design Library for Desi
Details →BoolSkeleton: Boolean Network Skeletonization via Homogeneous Pattern Reduction
Liwei Ni, Jiaxi Zhang, Shenggen Zheng, Junfeng Liu, Xingyu Meng, Biwei Xie, Xingquan Li*, and Huawei Li. BoolSkeleton: Boolean Network Skeletonization via Homogeneous Pat
Details →AiDRC: Accelerating Detailed Routing by AI-Driven Design Rule Violation Prediction and Checking
Yifan Li, Ruizhi Liu, Zhisheng Zeng, Zengrong Huang, Zhipeng Huang, Dongbo Bu, and Xingquan Li*. AiDRC: Accelerating Detailed Routing by AI-Driven Design Rule Violation P
Details →AiLO: A Predictive Framework for Logic Optimization Using Multi-Scale Cross-Attention Transformer
Ye Cai, Rui Wang, Liwei Ni, Miao Liu, Xingyu Meng, Xiaoze Lin, Junfeng Liu, Biwei Xie, and Xingquan Li*. AiLO: A Predictive Framework for Logic Optimization Using Multi-S
Details →iPO: Constant Liar Parameter Optimization for Placement with Representation and Transfer Learning
Xinhuan Lai, Miao Liu, Xingquan Li*, Yihang Qiu, Shijian Chen, Xinhao Li, Jungang Xu*, iPO: Constant Liar Parameter Optimization for Placement with Representation and Tra
Details →