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LIBRARY

AiEDA Library

Design-to-Vector: export design state from iEDA.ai flows as features, graphs, and tensors for training and inference.

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WHY

Why Library

Without open intermediate state, AI-for-EDA stays black-box. Library turns cells, nets, timing paths, congestion maps into versioned data interfaces for reproducible experiments.

  • Connects to unified iDB state
  • Serves Models and external training frameworks
  • Same product line as J12 AiEDA paper
design → vector
iDB snapshot
  → net/cell/timing/congestion
  → numpy / graph tensors
  → train or infer
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An Open-Source AI-Aided Design Library for Design-to-Vector

Overview

AiEDA is an open-source AI-native Electronic Design Automation (EDA) library that revolutionizes chip design workflows by introducing a unified design-to-vector methodology. Built on the iEDA infrastructure, it transforms diverse chip design data into standardized multi-level vector representations through modular engine integration, comprehensive data extraction frameworks, and hierarchical data management. AiEDA bridges traditional EDA tools with modern AI/ML techniques by providing complete physical design flows, programmatic data extraction capabilities, and standardized Python interfaces, establishing an AI-aided design (AAD) paradigm that enables seamless integration between EDA datasets and AI frameworks.

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Data Transformation for AI-aided design (AAD)

::: tip Note Github repo: https://github.com/OSCC-Project/AiEDA :::